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File:16 GiB-DDR4-RAM-Riegel RAM019FIX Small Crop 90 PCNT.png

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Summary

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Description
Deutsch: Ein DDR4-SDRAM-Riegel von Samsung mit 16 GiB Speicher bei 2666 MHz. Es handelt sich um das Model "M378A2K43CB1-CTD".
English: A DDR4 SDRAM bar from Samsung with 16 GiB of memory at 2666 MHz. It is the model "M378A2K43CB1-CTD".
Date
Source Own work
Author PantheraLeo1359531

Specifications:

  • Module Size: 16 Gibibytes (ca. 17,2 Gigabytes)
  • Memory Type: DDR4 SDRAM
  • Moduly Type: Unbuffered DIMM (UDIMM)
  • Memory Speed: 1333.3 MHz (DDR4-2666 / PC4-21300)
  • Manufacturer: Samsung
  • Module Part Number: M378A2K43CB1-CTD
  • Module Revision: No (0.0)
  • Module Serial Number: 1701500217 (39D56A65)
  • Module Manufacturing Date: Year 2018, Week 26
  • Error Check/Correction: No
  • Address Bits: 16
  • Column Address Bits: 10
  • Module Density: 8192 Mb
  • Number of Ranks: 2
  • Device Width: 8 bits
  • Bus width: 64 bits
  • Die Count: 1
  • Module Nominal Voltage (VDD): 1.2 V
  • Minimum SDRAM Cycle Time (tCKAVGmin): 0.75000 ns
  • Maximum SDRAM Cycle Time (tCKAVGmax): 1.60000 ns
  • CAS# Latencies Supported: 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20
  • Minimum CAS# Latency Time (tAAmin): 13.750 ns
  • Minimum RAS# to CAS# Delay (tRCDmin): 13.750 ns
  • Minimum Row Precharge Time (tRPmin): 13.750 ns
  • Minimum Active to Precharge Time (tRASmin): 32.000 ns
  • Supported Module Timing at 1333.3 MHz: 19-19-19-43
  • Supported Module Timing at 1200.0 MHz: 17-17-17-39
  • Supported Module Timing at 1066.7 MHz: 15-15-15-35
  • Supported Module Timing at 933.3 MHz: 13-13-13-30
  • Supported Module Timing at 800.0 MHz: 11-11-11-26
  • Supported Module Timing at 666.7 MHz: 10-10-10-22
  • Minimum Active to Active/Refresh Time (tRCmin): 45.750 ns
  • Minimum Refresh Recovery Time Delay (tRFC1min): 350.000 ns
  • Minimum Refresh Recovery Time Delay (tRFC2min): 260.000 ns
  • Minimum Refresh Recovery Time Delay (tRFC4min): 160.000 ns
  • Minimum Four Activate Window Delay Time (tFAWmin): 21.000 ns
  • Minimum Active to Active Delay Time - Different Bank Group (tRRD_Smin): 3.000 ns
  • Minimum Active to Active Delay Time - Same Bank Group (tRRD_Lmin): 4.900 ns
  • Minimum CAS to CAS Delay Time - Same Bank Group (tCCD_Lmin): 5.000 ns
  • Module Temperature Sensor (TSOD): Not Supported
  • Module Nominal Height: 31 - 32 mm
  • Module Maximum Thickness (Front): 1 - 2 mm
  • Module Maximum Thickness (Back): 1 - 2 mm
  • Address Mapping from Edge Connector to DRAM: Mirrored

Licensing

I, the copyright holder of this work, hereby publish it under the following license:
w:en:Creative Commons
attribution
This file is licensed under the Creative Commons Attribution 4.0 International license.
You are free:
  • to share – to copy, distribute and transmit the work
  • to remix – to adapt the work
Under the following conditions:
  • attribution – You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.

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Captions

High-resolution scan of a DDR4 SDRAM bolt with 16 GiB of memory @ 2666 MHz.

Items portrayed in this file

depicts

12 June 2021

image/png

9fabd4a8ba6c6a1b06b11dd5cb8fb9fbdf2f1d21

563,156,568 byte

5,661 pixel

23,294 pixel

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Date/TimeThumbnailDimensionsUserComment
current13:54, 25 July 2021Thumbnail for version as of 13:54, 25 July 202123,294 × 5,661 (537.07 MB)PantheraLeo1359531Uploaded own work with UploadWizard

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